System and method for charge control in a mems device

ABSTRACT

An electromechanical device is disclosed. The device includes a variable capacitor, and a switch circuit configured to pre-charge an input node with a pulse charge at said selected voltage level. The switch circuit includes only a first switch coupled to the variable capacitor and the first switch is configured to respond to an enable signal having a duration shorter than a mechanical time constant of the variable capacitor and the first switch is configured to apply the selected voltage level across the variable capacitor to cause the pulse charge to accumulate on the variable capacitor.

BACKGROUND

This is a continuation in part of U.S. patent application Ser. No. 08/032,711, filed Mar. 17, 1993.

This invention relates to visible spectrum (including ultra-violet and infrared) modulator arrays.

Visible spectrum modulator arrays, such as backlit LCD computer screens, have arrays of electro-optical elements corresponding to pixels. Each element may be electronically controlled to alter light which is aimed to pass through the element. By controlling all of the elements of the array, black and white or, using appropriate elements, color images may be displayed. Non-backlit LCD arrays have similar properties but work on reflected light. These and other types of visible spectrum modulator arrays have a wide variety of other uses.

SUMMARY OF THE INVENTION

In general, in one aspect, the invention features modulation of light in the visible spectrum using an array of modulation elements, and control circuitry connected to the array for controlling each of the modulation elements independently, each of the modulation elements having a surface which is caused to exhibit a predetermined impedance characteristic to particular frequencies of light.

Implementations of the invention may include the following features. The surface may include antennas configured to interact with selected frequencies of light, or the surface may be a surface of an interference cavity. The impedance characteristic may be reflection of particular frequencies of light, or transmission of particular frequencies of light. Each of the modulation elements may be an interference cavity that is deformable to alter the cavity dimension. The interference cavity may include a pair of cavity walls (e.g., mirrors) separated by a cavity dimension. One of the mirrors may be a broadband mirror and the other of the mirrors may be a narrow band mirror. Or both of the mirrors may be narrow band mirrors, or both of the mirrors may be broad band, non-metallic mirrors. The cavity may have a cavity dimension that renders the cavity resonant with respect to light of the frequency defined by the spectral characteristics of the mirrors and intrinsic cavity spacing in an undeformed state. One of the mirrors may be a hybrid filter. One (or both) of the walls may be a dielectric material, a metallic material, or a composite dielectric/metallic material. The cavity may be deformable by virtue of a wall that is under tensile stress. The control circuitry may be connected for analog control of the impedance to light of each element. The analog control may be control of the degree of deformity of the deformable wall of the cavity.

The predetermined impedance characteristic may include reflection of incident electromagnetic radiation in the visible spectrum, e.g., the proportion of incident electromagnetic radiation of a given frequency band that is, on average, reflected by each of the modulation elements. The modulation element may be responsive to a particular electrical condition to occupy either a state of higher reflectivity or a state of lower reflectivity, and the control circuitry may generate a stream of pulses having a duty cycle corresponding to the proportion of incident radiation that is reflected and places the modulation element in the higher state of reflectivity during each the pulse and in the lower state of reflectivity in the intervals between the pulses. The characteristic may include emission of electromagnetic radiation in the visible spectrum. The characteristic may include the amount of electromagnetic radiation in the visible spectrum that is emitted, on average, by the antennas. The characteristic may be incident electromagnetic radiation in the visible spectrum. The modulation elements may include three sub-elements each associated with one of three colors of the visible spectrum. The modulation element may be responsive to a particular electrical condition to occupy either a state of higher transmissivity or a state of lower transmissivity, and the control circuitry may generate a stream of pulses having a duty cycle corresponding to the proportion of incident radiation that is transmitted and places the modulation element in the higher state of transmissivity during each the pulse and in the lower state of transmissivity in the intervals between the pulses. The characteristic may include the proportion of incident electromagnetic radiation of a given frequency band that is, on average, transmitted by each of the modulation elements.

The visible spectrum may include ultraviolet frequencies, or infrared frequencies.

In general, in another aspect of the invention, the control circuitry may be connected to the array for controlling the amplitude of light delivered by each of the modulation elements independently by pulse code modulation.

In general, in another aspect, the invention features a modulation element having a deformable portion held under tensile stress, and control circuitry connected to control the deformation of the deformable portion.

Implementations of the invention may include the following features. The modulation element may be self-supporting, or held on separate supports. The deformable portion may be a rectangular membrane supported along two opposite edges by supports which are orthogonal to the membrane. The deformable portion, under one mode of control by the control circuitry, may be collapsed onto a wall of the cavity. The control circuitry controls the deformable portion by signals applied to the modulation element, and the deformation of the control portion may be subject to hysteresis with respect to signals applied by the control circuitry.

In general, in another aspect, the invention features modulating light in the visible spectrum using a deformable modulation element having a deformation mechanism and an optical portion, the deformation mechanism and the optical portion independently imparting to the element respectively a controlled deformation characteristic and a controlled modulation characteristic.

Implementations of the invention may include the following features. The deformation mechanism may be a flexible membrane held in tensile stress, and the optical portion may be formed on the flexible membrane. The optical portion may be a mirror. The mirror may have a narrow band, or a broad band, or include a hybrid filter.

In general, in another aspect, the invention broadly features a non-metal deformable modulation element.

In general, in another aspect, the invention features a process for making cavity-type modulation elements by forming a sandwich of two layers and a sacrificial layer between them, the sacrificial layer having a thickness related to the final cavity dimension, and using water or an oxygen based plasma to remove the sacrificial layer.

Among the advantages of the invention are the following.

Very high-resolution, full-color images are produced using relatively little power. The embodiment which senses the image incident on the array has relatively low noise. Their color response characteristics are tunable by selection of the dimensions of the antennas. The antenna or cavity embodiments are useful in portable, low power, full color displays, especially under high ambient light conditions. Phase controlled reflective embodiments are useful in passive light scanning such as optical disk readers without moving parts. The emissive embodiments also could be used as display devices especially in low-ambient-light conditions.

Because of the dielectric materials used in some embodiments, the devices have the advantage of being extremely light efficient, making them especially appropriate for high intensity projection displays, and reducing or eliminating the need for backlighting in low ambient light applications. In addition, more accurate color representations are possible, as well as designs optimized for the IR and UV. Mechanical hysteresis precludes the need for active drivers, and this coupled with their geometric simplicity and monolithic nature brings defect losses down significantly. The devices are also exceptionally fast, low power, and non-polarizing. The fact that they can be reflective and/or transmissive enhances their flexibility.

The process for fabrication as represented in some embodiments relies on benign chemicals, minimizing waste disposal problems, and facilitating the fabrication of devices on a variety of substrates (e.g., plastics or integrated circuits) using a larger variety of materials. Devices on plastic substrates have the potential of being extremely inexpensive. All of the manufacturing technologies used are mature, further reducing manufacturing costs.

Other advantages and features of the invention will become apparent from the following description and from the claims.

DESCRIPTION

FIG. 1 is a perspective view of a display device.

FIG. 2 is a perspective schematic exploded view of a representative portion of the screen of FIG. 1.

FIG. 3 is an enlarged top view of a tri-dipole of FIG. 2.

FIG. 4 is a schematic view of a single dipole antenna of FIG. 3.

FIG. 5 is a schematic perspective view, broken away, of a portion of the screen of FIG. 1.

FIG. 6 is an enlarged top view of an individual tri-bus of FIG. 2.

FIG. 7 is an enlarged perspective view of a representative portion of the screen of FIG. 1.

FIG. 8 is a cross-sectional view along 8-8 of FIG. 7.

FIG. 9 is a diagram of a portion of a control circuit of FIG. 2, and a corresponding dipole antenna of FIG. 3.

FIGS. 10A, 10B, 10C are representative graphs of the input voltage to the bias source of FIG. 9.

FIG. 11 is a diagram of portions of the control modules for a row of pixels,

FIG. 12 is a circuit diagram of an oscillator.

FIG. 13 is a schematic diagram of a circuit module of FIG. 2, a corresponding dipole antenna of FIG. 3, and a graphical representation of the output of a binary counter.

FIG. 14 is a circuit diagram of the pulse counter of FIG. 13.

FIGS. 15, 16, 17, 18, and 19 are top views of alternative dipole arrangements.

FIGS. 20A through 20D are perspective views of a cavity device.

FIGS. 21A and 21B are side views of the cavity device.

FIGS. 22A through 22F are graphs of frequency responses of the cavity device in different states.

FIGS. 23A and 23B are top and cutaway side views, respectively, of a display.

FIGS. 23C and 23D are top and cutaway side views, respectively, of another display.

FIG. 24A is a graph of an electromechanical response of the cavity device.

FIG. 24B is a graph of an addressing and modulation scheme for a display.

FIGS. 25A through 25N and FIGS. 26A through 26K are perspective views of the device during assembly.

FIGS. 27A through 27C are side views of dielectric mirrors.

FIG. 27D is a top view of a dielectric mirror.

FIGS. 28A, 28B are perspective and top views of a linear tunable filter.

FIGS. 29A, 29B are perspective and top views of a deformable mirror.

Referring to FIG. 1, device 20 includes a screen 22 for displaying or sensing a high resolution color image (or a succession of color images) under control of power and control circuitry 26. The image is made up of a densely packed rectangular array of tiny individual picture elements (pixels) each having a specific hue and brightness corresponding to the Part of the image represented by the pixel. The pixel density of the image depends on the fabrication process used but could be on the order of 100,000 pixels per square centimeter.

Referring to FIG. 2, each pixel is generated by one so-called tri-dipole 30. The boundary of each tri-dipole is

T-shaped. The tri-dipoles are arranged in rows 32 in an interlocking fashion with the “Ts” of alternating tri-dipoles oriented in one direction and the “Ts” of intervening tri-dipoles along the same row oriented in the opposite direction. The rows together form a two-dimensional rectangular array of tri-dipoles (corresponding to the array of pixels) that are arranged on a first, external layer 34 of screen 22. The array may be called an electrically alterable optical planar array, or a visible spectrum modulator array.

On a second, internal layer 36 of screen 22 so-called tri-busses 38 (shown as T-shaped blocks in FIG. 2) are arranged in an interlocking two-dimensional array 40 corresponding to the layout of the tri-dipoles on layer 34 above. Each tri-dipole 30 is connected to its corresponding tri-bus 38 by a multi-conductor link 42 running from layer 34 to layer 36 in a manner described below.

On a third, base layer 44 of screen 22 a set of circuit modules 46 are arranged in a two-dimensional rectangular array corresponding to the layouts of the tri-dipoles and tri-busses. Each circuit module 46 is connected to its corresponding tri-bus 38 by a six-conductor link 48 running from layer 36 to layer 44 in a manner described below.

Each circuit module 46 electronically controls the optical characteristics of all of the antennas of its corresponding tri-dipole 30 to generate the corresponding pixel of the image on screen 22. Circuit modules 46 are connected, via conductors 50 running along layer 44, to an edge of layer 44. Wires 52 connect the conductors 50 to control and power circuitry 26 which coordinates all of the circuit modules 46 to 25 generate the entire image.

Referring to FIG. 3, each tri-dipole 30 has three dipole sections 60, 62, 64. The center points 59, 61, 63 of the three sections are arranged at 120 degree intervals about a point 65 at the center of tri-dipole 30. Each section 60, 62, 64 consists of a column of dipole antennas 66, 68, 70, respectively, only ten dipole antennas are shown in each section in FIG. 3, but the number could be larger or smaller and would depend on, e.g., the density with which control circuits 46 can be fabricated, the tradeoff between bandwidth and gain implied by the spacing of the antennas, and the resistive losses of the conductors that connect the antennas to the control circuit 46. Only the two arms of each dipole antenna are exposed on layer 34, as shown in FIG. 3. The dipole antennas of a given section all have the same dimensions corresponding to a particular resonant wavelength (color) assigned to that section. The resonant wavelengths for the three sections 60, 62, 64 are respectively 0.45 microns (blue), 0.53 microns (green), and 0.6 microns (red).

Referring to FIG. 4, each dipole antenna 80 schematically includes two Ls 82, 84 respectively made up of bases 86, 88, and arms 90, 92. The bases of each antenna 80 are electrically connected to the corresponding circuit module 46. The span (X) of arms 90, 92 is determined by the desired resonant wavelength of dipole antenna 80; for example, for a resonant wavelength of lambda, X would be lambda/2. Dipole antennas 66, 68, 70 have X dimensions of 0.225 microns (lambda₁,/2), 0.265 microns (lambda₂/2), and 0.3 microns (lambda₃,/2), respectively. The effective length (Y) of bases 86, 88 from arms 90, 92 to circuit module 46 is also a function of the dipole antenna's resonant wavelength; for a resonant wavelength of lambda, Y is a multiple of lambda.

Referring to FIG. 5, each of the bases 86, 88 physically is made up of four segments; (1) one of the conductors 96 of link 42, (2) a portion 112 of tri-bus 38, (3) a short connecting portion 124 of tri-bus 38, and (4) one of the conductors 94 of link 48, which together define a path (e.g., the path shown as dashed line 97) with an effective length of Y from the arm (e.g., 92) to the circuit module 46.

The placement of link 42 perpendicular to the surface of layer 34 allows arms 90, 92 (formed on the surface of layer 34) to be spaced at an actual spacing Z that is closer than lambda/2, the minimum required effective Y dimension of bases 86, 88. Spacing Z maybe chosen based on the bandwidth/gain tradeoff, and for example may be one quarter of the resonant wavelength for the dipole antennas of a given section (i.e., lambda/4, or 0.1125 microns (lambda₁/4), 0.1325 microns (lambda₂/4) and 0.15 microns (lambda₃/4) for antennas 66, 68, 70, respectively).

Referring to FIG. 6, each tri-bus 38 is formed of aluminum on layer 36 and has three zigzag shaped bus pairs 100, 102, 104 for respectively connecting dipole antennas of the corresponding sections 60, 62, 64 of tri-dipole 30. Bus pairs 100, 102, 104 are connected to individual dipole antennas 66, 68, 70 via conductors of link 42 (FIG. 2) that are joined to the bus pairs at points, e.g., 106.

Each bus pair 100, 102, 104 has two parallel buses 108, 110. Bus 108 electrically connects together the arms of the dipole antenna 5 of the corresponding section and, independently, the related bus 110 electrically connects together the arms 92 of the dipole antennas of that same section.

Points 106 delineate a series of fragments 112, 114, 116 on each of the three bus pairs 100, 102, 104, respectively. Each fragment forms part of one or more of the bases 86, or 88 and therefore contributes to the effective Y dimension.

The lengths (Q) of fragments 112, 114, 116 are one-half of the resonant wavelengths (i.e. lambda/2) of the sections 60, 62, 64, or 0.225 microns (lambda₁,/2), 0.265 microns (lambda₂,/2), and 0.3 microns (lambda₃,/2), respectively.

The conductors of link 48 (FIG. 2) are attached to tri-bus 38 at points 118, 120, 122 at the ends of buses 108, 110. Between points 118, 120, 122 and the first points 106 on along buses 108, 110 are fragments 124, 126, 128, which also form portions of the bases 86, 88 and are included to adjust the effective Y dimensions of those bases to be integer multiples of lambda/2. The lengths of the three fragments 124, 126, 128 are 0.1125 microns, 0.1525 microns, and 0.1875 microns, respectively.

Referring to FIG. 7, each dipole antenna 80 is physically formed (of aluminum) on an insulating semiconductor (e.g. silicon dioxide of silicon nitride) substrate 130 (part of layer 34) by x-ray or electron beam lithography or other technique suitable for forming submicron-sized structures.

Tri-busses 38 (not seen in FIG. 7) are formed on the upper-side of a second insulating semiconductor substrate 132 (part of layer 36). Circuit modules 46 (not seen in FIG. 7) are part of a third insulating semiconductor substrate 134 (part of layer 44) and are connected by conductors 50 to gold contact pads 136 (only one shown, not to scale) formed on the edge of substrate layer 134.

Referring to FIG. 8, circuit module 46 is formed in and on substrate 134 by any one of several monolithic processes. A section 138 of the substrate 134, which has been previously coated with an insulating semiconductor oxide layer 140, is repeatedly masked (whereby small windows are opened in the oxide layer, exposing the semiconductor beneath) and exposed to n and p dopants to form the desired circuit elements (not shown in detail in FIG. 8).

The individual circuit elements are connected to each other and to external contact pad 136 (FIG. 7) by aluminum conductors 142, 50, respectively. To form the connections, holes 144 are opened in oxide layer 140 and a sheet of aluminum is deposited, filling holes 144. Using a masking technique similar to the one described above the unwanted aluminum is removed, leaving only conductors 142, 50.

Semiconductor substrate layer 132 is deposited directly on top of the remaining exposed oxide layer 140 and conductors 142, 50. Holes 146 (one shown) (opened using a suitable lithographic technique) are channels for the electrical conductors 147 of links 48, which connect tri-bus 38 and circuit module 46. Tri-bus 38 is etched from a sheet of aluminum deposited onto the surface of layer 132. The deposition process fills holes 146, thereby forming the conductors of links 48.

Substrate layer 130 is deposited onto the surface of substrate layer 132 and tri-bus 38. The arms of dipole antennas 80 are formed by depositing a sheet of aluminum onto the surface of layer 130 and etching away the unwanted metal. During the deposition process holes 148 are filled thereby forming the conductors 149 of links 42 between the arms of dipole antenna 80 and tri-bus 38.

The conductors 149 are the uppermost parts of bases 86, 88 (FIG. 4) of dipole antennas 66, 68, 70; the lengths of conductors 149 together with the lengths of fragments 112, 114, 116 (FIG. 6), the lengths of fragments 124, 126, 128, and the lengths of the conductors 147 determine the effective Y dimension of bases 86, 88.

The length of the conductors 149 is determined by the thickness of the substrate 130 through which links 42 pass. Substrate 130 and links 42 are 0.05625 microns (i.e. lambda₁,/8) thick. This thickness is achieved by controlling the deposition rate of the semiconductor material as layer 130 is formed.

The length of the conductors 149 is determined by the thickness of the substrate layer 132 through which they pass. This, layer and links 48 are therefore also 0.05625 microns 20 thick.

The Y dimensions for the dipole antennas 66, 68, 70 of sections 60, 62, 64 therefore are as follows:

(a) For section 60, Y equals the sum of 0.05625 microns (length of the conductor in link 42, lambda₁/8)+n*0.225 microns (where 0.225 microns=lambda₂/2, the length of a fragment 112, and n=the number of fragments 112 in each base 86, 88 of the nth dipole antenna 66 n)+0.1125 microns (length of fragment 124, lambda₁/4)+0.05625 microns (length of the conductor in link 48, lambda₁/8), and that sum equals (n+1)*(lambda_(1/2)).

(b) For section 62, Y equals the sum of 0.05625 microns (length of link 42, lambda₁/8)+n*0.265 microns (where 0.265 microns=lambda₂/2, the length of a fragment 114, and n=the number of fragments 114 in each base 86, 88 of the nth dipole antenna 68 n)+0.1125 microns (length of fragment 126, (lambda₁/2)−(lambda₁/4))+0.05625 microns (length of the conductor in link 48, lambda₁/8), and that sum equals (n+1)*(lambda₁/2).

(c) For section 64, Y equals the sum of 0.05625 microns (length of conductor in link 42, lambda₁/8)+n*0.3 microns (where 0.3 microns−lambda₃/2, the length of a fragment 116, and n equals the number of fragments 116 in each base 86, 88 of the nth dipole antenna 70 n)+0.1875 microns (the length of fragment 128, (lambda₃/2)−(lambda₁/4))+0.05625 microns (length of conductor in link 48), and that sum equals (n+1)*(lambda₃/2).

Referring again to FIG. 1, in some embodiments, the displayed image is not emitted from device 20 but is comprised of ambient light (or light from a source, not 25 shown) selectively reflected by the tri-dipoles 30 of screen 22.

In that case, each tri-dipole 30 receives ambient light having a broad spectrum of wavelengths and is controlled by the corresponding circuit module to reflect only that portion of the ambient light manifesting the hue and brightness of the desired corresponding pixel.

The hue generated by tri-dipole 30 depends on the relative intensities of the light reflected by sections 60, 62, 64. The overall brightness of that hue of light in turn depends on the absolute intensities of the light radiation reflected by sections 60, 62, 64. Thus, both the hue and brightness of the light generated by tri-dipole 30 can be controlled by regulating the intensity of the light reflected by the dipole antennas in each section of the tri-dipole; this is done by controlling the reflectivity of each dipole antenna, i.e., the percentage of the light of the relevant wavelength for that dipole antenna which is reflected.

The desired percentage is attained not by regulating the amount of light reflected at any given instant but by arranging for the antenna to be fully reflective in each of a series of spaced apart time slots, and otherwise non-reflective. Each dipole antenna, in conjunction with its circuit module, has only two possible states: either it reflects all of the light (at the antenna's resonant frequency), or it reflects none of that light. The intensity is regulated by controlling the percentage of total time occupied by the time slots in which the dipole antenna occupies the first state.

Each dipole antenna is controlled to be reflective or not by controlling the impedance of the dipole antenna relative to the impedance of the medium (e.g., air) through which the light travels. If the medium has an effective impedance of zero, then the relationship of the reflectivity of the dipole antenna to zero (the controlled impedance of the dipole antenna) can be derived as follows. If we define a three-axis system x-y-z in which the x and y axes are in the plane of the array and the z axis is the axis of propagation of the incident and reflected waves, where z=0 is the surface of the array, then the incident plus reflected wave for z<0 may be represented as:

$\begin{matrix} {\underset{\_}{\overset{\_}{E}} = {{\hat{x}{\underset{\_}{E}}_{0}^{{- j}\; {kz}}} + {\hat{x}{\underset{\_}{E}}_{r}^{{+ j}\; {kz}}}}} & (1) \\ {\underset{\_}{\overset{\_}{H}} = {\frac{V \times \underset{\_}{\overset{\_}{E}}}{- {j\omega\mu}_{0}} = {\hat{y}{\frac{1}{\eta_{0}}\left\lbrack {{{\underset{\_}{E}}_{0}^{{- j}\; {kz}}} - {{\underset{\_}{E}}_{r}^{{+ j}\; {kz}}}} \right\rbrack}}}} & (2) \end{matrix}$

where E (overbar) is the complex amplitude of the electric field of the sum of the transmitted wave and the reflected wave; E ₀ is the complex amplitude of the electric field of the transmitted 20 wave; E _(r), is the complex amplitude of the electric field of the reflective wave; x(hat) is the orientation of the electric field of the wave; H is the amplitude of the magnetic field; y(hat) is the orientation of the magnetic field; go is the permeability of free space; ε₀ is the permittivity of free space; k=ωsqrt[μ₀ε₀] is the wavenumber; and η=sqrt [μ₀/ε₀] is the impedance of free space. For z>0 (i.e., within free space) only the transmitted wave exists and is represented by

$\begin{matrix} {\underset{\_}{\overset{\_}{E}} = {\hat{x}{\underset{\_}{E}}_{t}^{{- j}\; k_{t}z}}} & (3) \\ {\underset{\_}{\overset{\_}{H}} = {\hat{y}\frac{1}{\eta_{t}}{\underset{\_}{E}}_{t}^{{- j}\; k_{t}z}}} & (4) \end{matrix}$

E(overbar) is the complex amplitude the transmitted wave at z=0, k_(t)=sqrt [με] is its wavenumber; η=sqrt [μ/ε] is the impedance of the medium, i.e. z>0. Boundary conditions (z=0) for tangential electric fields are imposed on equations 1 and 2 and they are combined to yield,

{circumflex over (x)}[E ₀ +E _(x) ]={circumflex over (x)}E _(t)   (5)

In the same way, continuity for tangential magnetic fields (z=0) at the boundary yields,

ŷ(1/η₀) (E ₀ −E _(R))=ŷ(1/η_(t))E _(t)   (6)

Dividing equations 5 and 6 by E ₀, and E ₀/η₀ respectively gives the following two equations:

1+E _(r) /E ₀ =E _(t) /E ₀   (7)

1−E _(R) /E ₀=(η₀/η_(t))(E _(t) /E ₀)   (8)

E _(r)/E ₀ is called Γ and is the complex reflection coefficient while E_(t)/η₀=T is called the complex transmission coefficient, and η_(t)/η₀=η_(n) is the normalized wave impedance. Solving for T and Γ yields

$\begin{matrix} {\underset{\_}{T} = {\frac{{\underset{\_}{E}}_{t}}{{\underset{\_}{E}}_{0}} = {\frac{2}{1 + {\eta_{0}/\eta_{t}}} = \frac{2\eta_{n}}{\eta_{n} + 1}}}} & (9) \\ {\underset{\_}{\Gamma} = {\frac{{\underset{\_}{E}}_{R}}{{\underset{\_}{E}}_{0}} = {{\underset{\_}{T} - 1} = \frac{\eta_{N} - 1}{\eta_{n} + 1}}}} & (10) \end{matrix}$

For matched impedance values, η₀=η_(n), the reflection coefficient is zero, and T=1 (i.e., no reflection), and in the case of a load at the boundary, a matched antenna, there is complete absorption.

As η_(n) approaches zero or infinity, the reflection coefficient approaches plus or minus one, implying total reflection.

Referring to FIG. 9, the impedance z_(L), of dipole antenna 80 is controlled by a variable resistance PIN diode 160 connected across bases 86, 88. PIN line 162 to the output of a bias high voltage or a low voltage based on a line 168 from power and the output of bias source 164 is a high voltage, the resistance R of PIN diode 160 (and hence the impedance (E,) of the dipole antenna is zero causing full reflection; when the output of bias source 164 is a low voltage 98, resistance R is set to a value such that the resulting impedance z@ is matched to z. (the impedance of the air surrounding the antenna), causing zero reflection.

To generate an entire image on screen 20, power and control circuitry 26 receives a video signal (e.g. a digitized standard RGB television signal) and uses conventional techniques to deliver corresponding signals to modules 46 which indicate the relative desired intensities of light reflected from all sections 60, 62, 64 of all of the tri-dipoles in the array at a given time. Circuit modules 46 use conventional techniques to deliver an appropriate stream of input control signal pulses to each bias source 164 on line 168.

The pulse stream on each line 168 has a duty cycle appropriate to achieve the proper percentages of reflectance for the three Sections of each tri-dipole. Referring to FIGS. 10A, 10B, and 10C, for example, pulse stream 170 has a period T and a 50% duty cycle. For the first 50% of each period T the input to bias source 164 is high and the Corresponding output of source 164 is a high voltage. During this portion of the cycle dipole antenna 80 will reflect all received light having the dipole antenna's resonant wavelength. For the second 50% of the cycle the output of source 164 will be low and dipole antennas 80 will absorb the received light. In FIGS. 10B, 10C, pulse streams 172, 174 represent a 30% duty cycle and a 100% duty cycle respectively; with a 30% duty cycle the effective intensity of the light radiation of the dipole antennas of the section will be 30%; for a duty cycle of 100%, the effective intensity is 100%.

For example, if a particular pixel of the image is to be brown, the relative intensities required of the three red, 25 green, and blue sections 60, 62, 64 may be, respectively, 30, 40, and 10. The input signals to the bias sources 164, carried on lines 168, would then have duty cycles, respectively, of 30%, 40%, and 10%. An adjacent pixel which is to be a brown of the same hue but greater brightness might require duty cycles of 45%, 60%, and 15%.

Referring to FIG. 11, to accomplish the delivery of the pulse width modulated signals from circuitry 26 to the pixel circuit modules 46, each circuit module 46 in the row includes storage 180, 182 for two bits. The bit 1 storage elements 180 of the modules 46 in the row are connected together to create one long shift register with the pulse width modulated signals being passed along the row data line 184 from pixel to pixel. If, for example, the period of the modulated signals is 1 millisecond and there are ten different intensity levels, then an entire string of bits (representing the on or off state of the respective pixels in the row during the succeeding 1/10 millisecond) is shifted down the row every 1/10 millisecond. At the end of the initial 1/10 millisecond all of the bits in elements 180 are shifted to the associated elements 182 by a strobe Pulse on strobe line 186. The content of each element 182 is the input to the driver 188 for the appropriate one of the three colors of that pixel, which in turn drives the corresponding section 60, 62, 64 of the tri-dipole. The rate at which data is shifted along the shift registers is determined by the number of elements on a given row, the number of rows, the number of intensity levels, and the refresh rate of the entire array.

In another embodiment, the light comprising the image is emitted by tri-dipoles 30 rather than being produced by reflected ambient light. In that case, each tri-dipole generates the light for a single pixel with a hue and brightness governed by the intensities of the light emitted by each of the three sections 60, 62, 64.

Each dipole antenna within a tri-dipole is caused to emit light at the resonant wavelength of that antenna by stimulating it using a signal whose frequency corresponds to the resonant wavelength. Thus, the sections 60, 62, 64 will emit blue (lambda₁), green (lambda₂), and red (lambda₃) light respectively when provided with signals whose frequencies equal, respectively, lambda₁, lambda₂ and lambda₃.

For an idealized dipole, the current I and current density J(overbar)(r′overbar) are described by

I=jωq   (11)

J ( r′)={circumflex over (z)}Id{dot over (o)}( r ′)   (12)

where q is the charge density; z(hat) indicates the direction of the current (along the z-axis); ω is angular frequency; and d is the distance between ideal point charges representing the dipole. The vector potential A(overbar) in polar coordinates is given by

$\begin{matrix} \begin{matrix} {\underset{\_}{\overset{\_}{A}} = {{\hat{r}A_{r}} + {\theta \; {\underset{\_}{A}}_{\theta}}}} \\ {= {\left( {{\hat{r}\cos \; \theta} - {\hat{\theta}\sin \; \theta}} \right)\frac{\mu_{0}\underset{\_}{I}d}{4\pi \; r}^{{- j}\; {kr}}}} \end{matrix} & (13) \end{matrix}$

where θ represents the angle relative to the dipole; θ(hat) is the angular orientation of the wave; μ₀ is the permeability of free space; r is radius from the dipole; r(hat) is radial orientation of the wave; A_(r) is the radial component of the vector potential; A_(θ) is the angular component of the vector potential; and k is a factor which is used to represent sinusoidally varying waves. The H field is given by

-   where φ is elevation, with respect to the dipole. The E field is     given by, -   The far-field equation is given by

$\begin{matrix} \begin{matrix} {\underset{\_}{\overset{\_}{H}} = {\phi {\frac{1}{\mu_{0}r}\left\lbrack {\frac{\delta}{\delta\theta}\left( {{r{\underset{\_}{A}}_{\theta}} - {\frac{\delta}{\delta\theta}\left( {\underset{\_}{A}}_{r} \right)}}\quad \right.} \right\rbrack}}} \\ {= {\phi \frac{j\; k\underset{\_}{I}d}{4\pi \; r}{^{{- j}\; {kr}}\left\lbrack {1 + \frac{1}{j\; {kr}}} \right\rbrack}\sin \; \theta}} \end{matrix} & (14) \\ \begin{matrix} {\underset{\_}{\overset{\_}{E}} = {\frac{1}{{j\omega\varepsilon}_{0}}{\nabla{\times \underset{\_}{\overset{\_}{H}}}}}} \\ {= {\sqrt{\mu_{0}/\varepsilon_{0}}\frac{j\; k\underset{\_}{I}d}{4\pi \; r}{^{{- j}\; {kr}}\begin{pmatrix} {{{\hat{r}\left\lbrack {\frac{1}{j\; {kr}} + \left( \frac{1}{j\; {kr}} \right)^{2}} \right\rbrack}2\cos \; \theta} +} \\ {{\hat{\theta}\left\lbrack {1 + \frac{1}{j\; {kr}} + \left( \frac{1}{j\; {kr}} \right)^{2}} \right\rbrack}\sin \; \theta} \end{pmatrix}}}} \end{matrix} & (15) \\ {{\underset{\_}{\overset{\_}{H}} = {\hat{\phi}\frac{j\; k\underset{\_}{I}d}{4\pi \; r}^{{- j}\; {kr}}\sin \; \theta}}{\underset{\_}{\overset{\_}{E}} = {\hat{\theta}\sqrt{\mu_{0}/\varepsilon_{0}}\frac{j\; k\underset{\_}{I}d}{4\pi \; r}^{{- j}\; {kr}}\sin \; \theta}}} & (16) \end{matrix}$

Equation (16) describes the radiation pattern away from a dipole antenna at distances significantly greater than the wavelength of the emitted electromagnetic wave. It is a very broad radiation pattern providing a wide field of view at relevant distances.

Referring to FIG. 12, the dipole antennas 66, 68, 70 of each section 60, 62, 64 are driven by signals (e.g., sinusoidal) with frequencies of 5×10¹⁴ Hz, 5.6×10¹⁴ Hz, and 6.6×10¹⁴ Hz for red, green, and blue, respectively. These signals are supplied by three monolithic oscillators 200 (one shown) within circuit module 46, each tuned to one of the three required frequencies.

In circuit 200 (an a stable multivibrator), the center pair of coupled transistors 202, 204 are the primary active elements and will oscillate if the circuit admittance's are set appropriately. Diodes 206, 208, 210, 212 provide coupling capacitance's between the transistors and the inductors 214, 216 are used to tune the operating frequency.

In a third embodiment, an image of the object is focused by a conventional lens (not shown in FIG. 1) onto screen 22, which then acts as an image sensor. The tri-dipoles of screen 22, controlled by power and control circuitry 26, generate electrical signals corresponding to pixels of the received image. The signals are then processed by a processor which, in conventional fashion, delivers a derived RGB video signal which can then be transmitted or stored.

The signals generated for each tri-dipole are generated by the corresponding circuit module 46 and represent the hue and brightness of the light radiation received at that tri-dipole.

Each section of tri-dipole 30 can only be used to measure light having the resonant wavelength of its respective dipole antennas, however, because most colors can be expressed as a combination of red, green, and blue, circuit module 46 can, by independently measuring the intensity of the light radiation received at each section 60, 62, 64, derive a signal which specifies the hue and intensity of the received pixel.

Referring to FIG. 13, dipole antenna 80 will absorb incident light radiation at its resonant wavelength when its reflection coefficient (Γ_(L)) is zero, which occurs when its controlled impedance (z_(L)) matches the impedance of the medium (z₀). In those circumstances, a voltage pulse is produced across the ends 308, 310 of dipole 80 for each incident photon. The relative magnitude of the light radiation received by each dipole antenna can thus be measured by counting the average number of pulses across ends 308, 310 over a given time period.

In this embodiment, circuit module 46 includes a terminating load resistor 315 connected across ends 308, 310. The controlled impedance of the combination of dipole antenna 80 and resistor 315, described by the equations set forth below, is equal to z₀.

The voltage of the pulse across resistor 315 (created by an incident photon) is illustrated by the sine wave graph above register 15 and is described generally by the following equation

V(z)= V+e ^(−jkz)+Γ_(L) e ^(jkz)   (17)

Because z_(L)=z₀, Γ_(L)=0, and equation 17 simplifies to

V(z)= V+e ^(−jkz)   (18)

A pulse detector 318 amplifies and sharpens the resulting pulse to a square wave form as shown, which is then used as the clock (CLK) input 319 to a binary counter 320. The output of the binary counter is sampled at a regular rate; collectively the samples form a digital signal representing the intensity of received light radiation over time. Each time counter 320 is sampled, it is reset to zero by a pulse on control line 322, Counter 320 thus serves as a digital integrator that indicates how much light arrived in each one of a succession of equal length time periods.

Referring to FIG. 14, in pulse detector 318 the pair of transistors 322, 324 serve as a high impedance differential stage whose output (representing the voltage difference between points 308, 310) is delivered to an amplifier 326. Amplifier 326 serves as a high-bandwidth gain stage and delivers a single sided output pulse to a conditioning circuit 328 that converts slow rising pulses to square pulses 330 for driving counter 320.

In another embodiment, the array of tri-dipoles is operated as a phased array. The operation of phased arrays is discussed more fully in Amitay, et al., Theory and Analysis of Phased Array Antennas, 1972, incorporated herein by reference. By controlling the spacing of successive tri-dipoles across the array and the relative phases of their operation, wave cancellation or reinforcement can be used to control the direction in three dimensions and orientation of the radiation. Beams can thus be generated or scanned. In the case of an array used to sense incoming radiation, the array can be made more sensitive to radiation received from selected directions.

Other embodiments are also possible. For example, referring to FIG. 15, each section of tri-dipole 400 array be a single dipole antenna 406, 407, 408. The tri-dipole antennas are then arranged about a center Point 410 at 120 degree intervals in a radial pattern. Bases 411, 412, as well as arms 414, 415, of the dipole antennas, are all formed on the same surface.

Referring to FIG. 16, each section may consist of multiple dipole antennas 406, 407, 408 connected by attaching the bases 411, 412 of each succeeding dipole antenna to the inner ends of arms 414, 415 of the preceding dipole antenna. Circuit modules 416 are formed on the surface of layer 413.

Referring to FIG. 17, a multi-dipole 430 could have five sections 432, 434, 436, 438, 440 composed of dipole antennas 442, 444, 446, 448, 450, respectively. The dipole antennas of the different sections would have different resonant wavelengths. Other multi-dipoles might have any number of sections.

The scanning of pixels could be done other than by pulse width modulation, for example, using charge coupled devices to shift packets of charge along the rows of pixels.

Referring to FIGS. 18, 19, other arrangements of dipole antennas may be used in order to match the area required for the control circuit modules.

Referring to FIG. 18, each section 470 of a tri-dipole in the reflective mode could be formed of a number of subsections (e.g., 472) arranged in two rows 474 and a number of columns 47. The antennas 478 in each subsection 472 are all served by a single PIN diode circuit 480 located at the peripheral edge of section 470 at the end of the subsection on the layer below the antenna layer. All circuits 480 for the entire Section 470 are in turn served by a single bias source 164 (FIG. 9). This arrangement reduces the number of bias sources required for the entire array of tri-dipoles. FIG. 19 shows an alternate arrangement in which there is but one row of subsections each served by a single PIN diode circuit at the end of the row.

In order to reduce the number of conductors 50, selected tri-dipoles could be used to receive control signals transmitted directly by light and to pass those control signals to the control circuits of nearby active tri-dipoles.

The dipoles could be mono-dipoles comprised of only a single dipole antenna, all with the same resonant wavelength.

Dipole antennas 470 could be randomly arranged on the surface of layer 472 of screen 22.

A different color regime, e.g. cyan-magenta-yellow, could be substituted for RGB.

Spiral, biconical, slotted, and other antenna configurations could be substituted for the dipole configuration.

The array could be three-dimensional.

The successive tri-dipoles in the array can be oriented so that their respective antennas are orthogonal to each other to enable the array to interact with radiation of any arbitrary polarization.

The PIN diodes could be replaced by other impedance controlling elements. Such elements might include quantum well transistors, superconducting junctions, or transistors based on vacuum microelectronics. Further improvement could be achieved by reducing the complexity of the third layer containing control circuitry. The electronics required to get control signals to the circuitry could be eliminated by the use of laser or electron beams to provide such signals. This would have the advantage of allowing for arrays of even higher density.

The array could be fabricated on a transparent substrate, thus facilitating transmissive operation.

In other embodiments, the antenna arrays alone (without control circuitry or connection buses) may be fabricated on one-half of a microfabricated interferometric cavity. The antenna array can be considered a frequency selective mirror whose spectral characteristics are controlled by the dimensions of the antennas. Such a cavity will transmit and reflect certain portions of incident electromagnetic radiation depending on (a) the dimensions of the cavity itself and (b) the frequency response of the mirrors. The behavior of interferometric cavities and dielectric mirrors is discussed more fully in Macleod, H. A., Thin Film Optical Filters, 1969, incorporated by reference.

Referring to FIG. 20 a, two example adjacent elements of a larger array of this kind include two cavities 498, 499 fabricated on a transparent substrate 500. A layer 502, the primary mirror/conductor, is comprised of a transparent conductive coating upon which a dielectric or metallic mirror has been fabricated. Insulating supports 504 hold up a second transparent conducting membrane 506. Each array element has an antenna array 508 formed on the membrane 506. The two structures, 506 and 508, together comprise the secondary mirror/conductor. Conversely, the antenna array may be fabricated as part of the primary mirror/conductor. Secondary mirror/conductor 506/508 forms a flexible membrane, fabricated such that it is under tensile stress and thus parallel to the substrate, in the undriven state.

Because layers 506 and 502 are parallel, radiation which enters any of the cavities from above or below the array can undergo multiple reflections within the cavity, resulting in optical interference. Depending on the dimensions of the antenna array, as explained above, the interference will determine its effective impedance, and thus its reflective and/or transmissive characteristics. Changing one of the dimensions, in this case the cavity height (i.e., the spacing between the inner walls of layers 502, 506), will alter the optical characteristics. The change in height is achieved by applying a voltage across the two layers at the cavity, which, due to electrostatic forces, causes layer 506 to collapse. Cavity 498 is shown collapsed (7 volts applied), while cavity 499 is shown uncollapsed (0 volts applied).

In another embodiment, FIG. 20 b, each cavity may be formed by a combination of dielectric or metallic mirrors on the two layers, and without the antennas formed on either layer. In this case the spectral characteristics of the mirror are determined by the nature and thickness(es) of the materials comprising it.

In an alternative fabrication scheme, FIG. 20 c, each cavity is fabricated using a simpler process which precludes the need for separately defined support pillars. Here, each secondary mirror/conductor, 506, is formed in a U-shape with the legs attached to the primary layer; each secondary mirror/conductor thus is self-supporting.

In yet another cheme, FIG. 20 d, the cavity has been modified to alter it's mechanical behavior. In this version, a stiffening layer, 510, has been added to limit deformation of the membrane while in the driven state. This assures that the two mirrors will remain parallel as a driving voltage is gradually increased. The resulting device can be driven in analog mode (e.g., cavity 511 may be driven by 5 volts to achieve partial deformation of the cavity) so that continuous variation of its spectral characteristics may be achieved.

Referring to FIGS. 21A and 21B, the modulation effect on incident radiation is shown. The binary modulation mode is shown in FIG. 21A. In the undriven state (shown on the left) incident light 512 (the delta lambda represents a range of incident frequencies, e.g., the range of visible light) contains a spectral component which is at the resonant frequency of the device in the undriven state. Consequently this component (delta lamba n) is transmitted, 516, and the remaining components (at nonresonant frequencies, delta lambda minus delta lamba n) are reflected, 514. This operation is in the nature of the operation of a fabry-perot interference cavity.

When the device is driven and the geometry altered to collapse (right side of figure), the resonant frequency of the device also changes. With the correct cavity dimensions, all of the incident light (delta lamba) is reflected.

FIG. 21A shows a binary mode of operation while FIG. 21B shows an analog mode, where a continuously variable voltage may be used to cause a continuously variable degree of translation of secondary mirror/conductor 506. This provides a mechanism for continuous frequency selection within an operational range because the resonant frequency of the cavity can be varied continuously. In the left side of FIG. 21A, the transmitted wavelengths are delta lambda n zero, while in the right hand side they are delta lambda n one.

The equations which explain the performance of the cavity are set forth at the bottom of FIG. 21B. Equation 1 defines the transmission T through a fabry-perot cavity. Ta, Tb, Ra, Rb are the transmittances and reflectances of the primary (a) and secondary (b) mirrors. Phi a and Phi b are the phase changes upon reflectance at the primary and secondary mirrors, respectively. Delta is the phase thickness. Equation 2 defines the phase thickness in terms of the cavity spacing ds, the index of refraction of the spacer ns, and the angle of incidence, theta s. Equation 3 shows that the transmission T becomes the transmission of the second mirror when the transmission of the first mirror approaches 0.

There are a number of particular frequency response modes which would be useful in applying the invention to displays. FIGS. 22A through 22F illustrate some of the possibilities and relate to the equations of FIG. 21B. These are idealized plots which illustrate transmission and reflectivity (T/R) of the cavity for wavelengths in the visible range in driven and undriven states for each of the driven and undriven response modes. The different modes are achieved by using different combinations of mirrors and cavity spacings.

The spectral characteristics of the mirrors used can be referred to as broad-band and narrow-band. The mirrors are optimized for the visible range with a broad band mirror operating across the entire visible range (i.e., reflecting over a minimum range of 400 nm to 700 nm). Such a mirror is denoted in the stack formula 1.671¦0.775(ERS) 0.833M (ERS)¦1.671 where ERS denotes an equal ripple filter. The ERS filter has layers which are a quarter wavelength thick, and their refractive indices are n0=1.671, n1=1.986, n2=1.663, n3=2.122, n4=1.562, n5=2.240, n6=1.495, n7=2.316, n8=1.460, n9=2.350, n10=1.450. A narrow-band filter optimized for the color green would reflect only over the range of 500 nm to 570 nm, and transmit everywhere else. Such a filter is described by the stack formula 1¦C1 2C2 (3A/2 3B1 3A/2)2 (3A/2 3B 3A/2)6 (3A/2 3B1 3A/2)2¦1.52 where the refractive indices are nA=0.156, nC2=nB1=1.93, and nB=2.34.

The cavity spacing (i.e., cavity height) in both driven and undriven states can be set to a predetermined value by the film thicknesses used in its construction. These two values determine whether a cavity is resonant or non-resonant. For a resonant cavity, the spacing is determined such that the undriven state coincides with the resonant peak of the narrower of the two mirrors. When a device is non-resonant, it must be driven in order for the device to become resonant.

For example, if the undriven cavity spacing were 535 nm then, because this coincides with the center of the previously defined narrow-band mirror, there would be a transmission peak at this frequency. Peak spacing for this cavity is 267 nm so the other peaks, which would occur in the standard Fabry-Perot fall outside of range of the narrow band mirror. This would be considered a resonant cavity because the peak occurs in the undriven state. Driving the cavity so that the spacing were 480 nm would result in no transmission peak because all of the cavity peaks are outside the range of the narrow-band mirror. For all practical purposes the narrow-band mirror does not exist at this frequency and therefore the transmission peak disappears.

FIG. 22A shows a T/R plot of a cavity having broad band mirrors on both layers of the cavity. When undriven, this results in transmission/reflection peaks which occur at wavelengths which are approximately integral multiples of the cavity spacing. (the notation m delta lambda n in FIG. 21A denotes the fact that there may be a series of peaks.) This is classic fabry-perot behavior. In the driven state (shown to the right in FIG. 22A), the cavity resonance is shifted out of the visible range causing the device to act like a broadband mirror.

FIG. 22B shows a T/R plot for a cavity having one broad band and one narrow band mirror. This device has a resonant cavity, causing a transmission peak at the center of the narrow-band mirror's passband when the device is in the undriven state. Driving the device (right hand side of FIG. 22B) shifts the cavity resonance away from that of the narrow band mirror, and the device acts like a broadband mirror.

In FIG. 22C, the cavity is like that of FIG. 22B, except the cavity is non-resonant which results in broadband mirror cavity behavior in the undriven state. When driven, the cavity spacing shifts into resonance, causing a transmission peak centered on the narrow-band mirror.

FIG. 22D shows the performance of a resonant cavity with two narrow-band mirrors. When undriven, there is a transmission peak centered on the mirrors' response. Since the mirrors are narrow-band, the overall cavity response is that of a broad-band transmitter. Driving the device out of resonance (i.e. active) results in a reflective peak at the narrow-band center frequency.

Like FIG. 22D, the cavity of FIG. 22E has two narrow band mirrors, but it is a non-resonant cavity. Consequently its behavior is opposite that of the cavity portrayed in FIG. 22D.

Thus, when one of the mirrors is narrow banded, mirror a for example, the transmission approaches zero for frequencies outside its range. This is essentially the transmission of mirror b. When both of the mirrors are narrow banded, the transmission becomes a maximum outside the frequency range. In either case, the spurious peaks typical of a fabry-perot are avoided. The result is a device which can be described as a single mode resonant cavity.

When both of the mirrors are narrow banded, then fabry-perot type behavior occurs only when the cavity spacing is correct. Making the mirrors narrow enough allows only a single peak to occur. Then it is unnecessary to be concerned about spurious peaks that might occur within the visible range.

FIG. 22F is for a cavity with a simpler design involving only a metallic mirror on one wall and a hybrid filter on the other wall. The hybrid filter is a combination of a narrow bandpass filter (outer surface) and an induced absorber (inner surface). The induced absorber is a simple structure which can consist of one or more dielectric or dielectric and metallic films. The function of the absorber is to cause incident light of a specified frequency range to be absorbed by a reflective surface (i.e. mirror). One such design can be achieved with a single film of refractive index n=1.65 and a thickness of 75.8 nm. The induced absorber only functions when it is in contact with the mirror, otherwise it is inconsequential.

In the undriven state, the hybrid filter (a green centered narrow bandpass/induced absorber) reflects everything but the green light, which is unaffected by the induced absorber and subsequently reflected by the metallic mirror. Thus the overall cavity response is like that of a broad-band mirror. When in the driven state, the hybrid filter comes into contact with the metallic mirror. The absorber couples the green light into the mirror, and the result is an absorption peak at that wavelength.

Referring to FIG. 23A, a red 3×3 pixel (i.e., 9 cavities) subtractive mode display array based on the cavity device using the N-N (narrow band-narrow band) configuration of FIG. 22D is shown. The cavity pixels are formed at the intersections of primary mirror/conductors 602 and secondary mirror/conductors 604. The display is fabricated on substrate 608 and driven via contact pads 606 connected to each conductor/mirror 604.

A full nine-pixel display comprises three replications of the array of FIG. 23A arranged on top of one another and fabricated on separate substrates or color planes 610, 612, 614, as shown in FIG. 23B. Each of the individual color planes interacts only with and reflects one color (e.g., red, green, or blue), while passing all other colors. This is done by selecting the mirror spectral characteristic and cavity spacing in each color plane appropriately. The color planes are physically aligned and electrically driven through the contact pads to produce full color images. The image would be viewed from below in FIG. 23B.

Referring to FIGS. 23C and 23D, a single layer composite approach is shown. Such a device would be more complicated to fabricate (though the mirror designs are simpler) but may suffer from inferior resolution. In this case, all three colors reside on the same array 616. Devices using either the B-B, B-N, N-N, or the M-F (B=broad band, N=narrow band, M=mirror, H-F=hybrid filter) configuration are used for this display.

Either the three plane or the single plane approach may be used in either transmissive and reflective modes. Pixel size and overall display size can be altered to make the displays useful in many different display and spatial light modulator applications. These include direct view and projection displays, optical computing, holographic memory, and any other situation where a one or two dimensional modulator of light can be used.

Because these structures depend on electrostatic attraction, which varies in an exponential fashion with cavity spacing, while the mechanical restoring force of the membrane varies linearly with cavity spacing, they exhibit hysteresis. As seen in FIG. 24A, the straight line labelled membrane tension shows that the restoring force on the membrane varies inversely linearly with distance (i.e., cavity spacing). That is, the smaller the spacing, the stronger the mechanical force tending to restore the original, at rest spacing. On the other hand, electrical attraction between the two layers of the cavity (the curved line) varies exponentially with smaller spacing, that is, as the two layers get closer there is an exponential increase in the attractive force between them. This causes a hysteresis effect as follows. With a low driving voltage applied, the secondary mirror/conductor experiences a displacement towards the substrate until the force of restoration balances the electrical attraction. However if the voltage is raised past a point known as a collapse threshold, the force of restoration is completely overcome and the membrane is pressed tightly against the substrate. The voltage can then be lowered again to some degree without affecting the position of the membrane. Only if the voltage is then lowered significantly or eliminated will the membrane be released. Because the membrane is under tensile stress, it will then pull itself away from the substrate when the voltage is released. This hysteresis can be used to achieve matrix addressing of a two-dimensional array, as explained with reference to FIG. 24B.

The display can be addressed and brightness controlled using control pulse sequences in the driving voltage. Shown is a timing diagram for a 3×3 pixel array analogous to that shown in FIG. 23A. During operation, a continuous series of −5 volts scanning pulses is applied to the rows (rows 1-3) of the pixel array in a sequential fashion, as seen in the charts labelled “Row”. The pulses appear at the same frequency on each of the rows but the pulses for different rows are staggered. These pulses are insufficient in their own right to cause the membrane to collapse. The columns (cols. 1-3) of the pixel array (see charts labelled “Col) are maintained at a bias voltage of 5 volts so that the nominal voltage across each unactivated pixel is 5 volts. At times when the scan pulses are delivered to that pixel, the nominal row and column potentials are 5 and −5 volts respectively, resulting in a cavity voltage of 10 volts. With a 10 volts potential applied to the row and a −5 volts potential to the column, the total voltage across the cavity becomes 15 volts which is sufficient to drive the secondary mirror/conductor into the collapsed state, where it will remain until the end of the scan when all of the column voltages are pulsed to zero. The three charts at the bottom of FIG. 24B show the on and off states of the three pixels identified there by row and column numbers.

The intensity or brightness of a pixel may be varied by changing the fraction of the scan during which the pixel is activated. The scan cycle begins at 198 and ends at 199. The frequency of the scan pulses is such that six pulses of a given row fall within the scan cycle, providing an opportunity to activate a pixel at any one of six times during each cycle. Once the pixel is activated it stays on until the end of the cycle. Therefore six different intensities are possible for each pixel. For the scan shown, pixel C1R1 is at full brightness, pixel C2R2 is at 4/6 brightness, and pixel C3R2 is at ⅙ brightness. All pixels are cleared at the end of the scan and the cycle begins again. Since these structures can be driven at frequencies as high as 50 kHz, this method of brightness control is practical. Assuming six brightness levels, there would be a possibility of more than 8 thousand row scans per second.

Two processes for fabricating the arrays will be discussed; others may also be possible.

Referring to FIG. 25A, substrate 700 is first cleaned using standard procedures. The substrate may be of many different materials including silicon, plastic, mylar, or quartz. The primary requirement is that the material be able to support an optically smooth, though not necessarily flat, finish. A preferred material would likely be glass, which would permit both transmissive and reflective operation in the visible range.

The substrate is then coated with the primary conductor/mirror layer(s) 702. This can be achieved using a physical vapor deposition (PVD) method such as sputtering or e-beam evaporation. Other possible methods include chemical vapor deposition and molecular beam epitaxy. The dimensions and nature of the layer(s) depend on the specific configuration desired. Detailed examples are discussed below.

Referring to FIG. 25B, a photoresist 704 has been patterned on the primary conductor/mirror. The photoresist may be of a positive or negative type. The standard procedure for this step involves spinning of the resist, softbaking at 90 C., exposing through an appropriate mask, developing to produce the pattern, and hardbaking at 130 C.

Referring to FIG. 25C, the photoresist pattern is defined in the primary conductor/mirror by an etching process. This step can be achieved either by wet chemical means or by plasma or reactive ion etching (RIE). The choice of etching technique depends on the nature of the conductor/mirror. In the case of an aluminum conductor/mirror, chlorine gas may be used to perform the etch, with a standard chamber power of 100 watts producing an etch rate of 100 angstroms/min. Some mirror materials may resist RIE and in such cases a technique such as ion milling may be used. All RIE steps are performed at a pressure of 30 mtorr unless otherwise noted. All plasma etch steps are performed at a pressure of 100 mtorr unless otherwise noted. The photoresist is removed using standard solvents.

Alternatively, the conductor/mirror may be defined using the well-known procedure called lift-off. This procedure is used to define a layer in a subsequent step and is described below.

Referring to FIG. 25B, support rail material 706, has been deposited using one of the methods mentioned previously. This material should be an insulator, for example silicon dioxide or silicon nitride. The material should be deposited uniformly, and at a thickness equal to thickness of the spacer layer, which will be deposited later. This thickness should in general be at least a multiple of the wavelength of light of interest. A thickness of 0.5 microns would place such a device near the middle of the visible spectrum.

Referring to FIG. 25E, photoresist layer 708 is spun on and hardbaked. Since this layer will not be photolithographically defined, other polymeric materials may be used instead. The only requirement is that they dissolve in solvents such as acetone or methanol, and be able to withstand a vacuum. This is the first step in defining a lift-off stencil.

Referring to FIG. 25F, template layer 710 has been deposited using one of the methods of PVD. The layer is of silicon dioxide though other materials are possible. Ideally the material should be etched using a process which does not affect the underlying resist. Buffered Oxide Etch (BOE) which consists of Hydrofluoric acid diluted 7:1 with water can perform this step in 15 seconds. The layer need only be a thousand angstroms thick.

In FIG. 25G, photoresist layer 712 has been spun-on and patterned in a manner already discussed.

Referring to FIG. 25H, using a combination of BOE and RIE, the pattern of resist layer 711 has been transferred to layers 710 and 708. In the first step, the BOE is used to etch through the silicon dioxide layer 710. An oxygen plasma is used to etch through resist layer 708, and to remove resist layer 711. Plasma etching differs from RIE in that it tends to be less anisotropic, yielding profiles that are not purely vertical.

Referring to FIG. 25I, using an oxygen plasma, resist layer 708 has been slightly underetched in order to facilitate removal of the lift-off stencil. RIE using a carbon tetrafluoride chemistry (CF4/02 6:4) is then applied to etching through layer 706.

Referring to FIG. 25J, spacer layer 712 is deposited using PVD techniques. This material can be any number of different compounds which can be deposited using this technique. There are two key requirements for such a material. The first is that the material be soluble in water but not in solvents such as acetone or methanol. Example materials include lithium fluoride, aluminum fluoride, and sodium chloride. The second is that it be deposited with extreme uniformity and thickness control.

The former allows resulting structures to be underetched without damage by using water as the final etchant. Water is an extremely benign solvent, and makes possible the incorporation of many different mirror, conductor, and structural materials in the final device.

The latter insures that subsequent layers conform to the variations of the substrate and therefore primary conductor/mirror. This parallelism is essential for the optical behavior of the resonant cavity devices.

The spacer may also be composed of a polymeric material such as hardbaked photoresist or polyimide. To achieve the required thickness uniformity, a technique other than spinning must be used to deposit the polymer. Two such techniques include extrusion and capillary coating. The consequence of using such a spacer is that all subsequent process steps must be low temperature in nature to prevent outgassing and shrinkage of this layer. In this case, the spacer is ultimately removed using an oxygen plasma.

The stencil is subsequently removed using an ultrasonic acetone bath and methanol rinse. This also removes or lifts off excess deposited spacer material and is what constitutes the final step of the lift-off process.

Alternatively, by using negative photoresist and an oppositely polarized mask, a natural overhang may be produced via overexposure. The same may be accomplished with positive photoresist using a technique known as image-reversal. This would preclude the need to put down a sacrificial photoresist layer and a subsequent SiO2 layer.

Referring to FIG. 25K, secondary conductor/mirror layer(s) and support membrane (714) are deposited. The nature of the conductor/mirror is dependent on the application. The support membrane must have a tensile residual stress. Tensile stress is required for two reasons. First so that the resulting membranes will be flat and therefore parallel to the substrate in the quiescent state. Secondly, such structures have a tendency to stick when the membranes come in contact with the substrate. Sufficient tensile stress is required pull the membrane away when the drive voltage is reduced.

The membrane must have the appropriate optical characteristics as well. For visible light this would mean transparency in the visible region. Silicon nitride is one candidate for this role for it can be deposited using plasma enhanced chemical vapor deposition (PECVD) with controlled stress. Other candidates include silicon dioxide, magnesium fluoride and calcium fluoride, all of which can be deposited using e-beam evaporation with a resulting tensile stress.

In FIG. 25L, photoresist layer 716 has been spun-on and patterned in a manner discussed above.

In FIG. 25M, using RIE or ion milling, layer(s) 714 have been etched according to the pattern of resist layer 716.

Referring to FIG. 25N, the final etch is accomplished by placing the device in water for a period of time. The water is agitated, and when the devices are fully etched they are dried.

One variation on this step involves the use of n-butyl alcohol to displace the water when the etch is finished. The devices are then placed in a chamber at approximately 32 degrees centigrade to cause the alcohol to freeze. After this step the devices are placed into a vacuum chamber where the air is then evacuated. This causes the alcohol to sublime and can reduce membrane sticking during the drying phase.

Another alternative process has initial steps of assembly shown in FIGS. 26A through 26C, analogous to those shown in FIGS. 25A through 25C.

Thereafter, in FIG. 26D, photoresist or polymer layer 806 is spun on and a stencil layer, 208, of silicon dioxide is deposited using PVD. This layer must be thicker than the spacer layer to be deposited.

In FIG. 26E, resist layer 810 has been spun-on and patterned using standard procedures.

In FIG. 26F, this step uses BOE and an oxygen plasma etch to define a lift-off stencil.

In FIG. 26G, the spacer material is chosen and deposited as described in FIG. 25J.

In FIG. 26H, the stencil is subsequently removed using an ultrasonic acetone bath and methanol rinse.

The step shown in FIG. 26I is analogous to that shown in FIG. 25K.

In FIG. 26J, photoresist layer 814 has been spun-on and patterned.

In FIG. 26K, using RIE or ion milling, layer(s) 812 have been etched according to the pattern of resist layer 214.

The final etch is accomplished in a manner described above.

All of the materials used for the mirrors must be deposited in such a way that their stress can be controlled. Ideally, they are deposited as “stress balanced” which means that the overall stress of the film or film stack is zero. Since the ultimate goal is that the support membrane conductor/mirror combination have an overall tensile stress, conductor/mirror films with compressive stress may be accommodated by having a high stress support membrane. The technique of ion assisted e-beam deposition (IABD) precludes the need for such accommodation. Using this technique, the residual stress of almost any film of interest may be controlled by bombarding the substrate with a stream of neutral ions during the deposition process. This make possible the total mechanical decoupling of the support material from the optical material. As a result, emphasis can be placed on depositing an optically neutral support membrane with ideal mechanical characteristics. In the same manner, a “mechanically neutral” (i.e. stressless) conductor/mirror can be deposited with ideal optical characteristic.

Referring to FIG. 27A, the simplest conductor/mirror configuration for an individual cavity is formed from a layer 900 that is either the substrate for the primary conductor/mirror, or the support membrane if this is the secondary. Layer 902 is a metallic film with a thickness on the order of several hundred angstroms. The film can be of aluminum, silver, or any number of metals, based on the spectral, and resistive properties as well as the ease with which the metal can be etched.

The use of a metal as both mirror and conductor simplifies fabrication. Unfortunately the spectral characteristics of the metallic layer cannot be tailored, and the performance limits devices to very specific kinds of behavior. Layer 904 is an insulator and/or reflection enhancement film. This can be formed by oxidizing the metal, if aluminum is being used, in an oxygen plasma thus forming a thin layer of aluminum oxide. Alternatively, insulating layers or reflection enhancement layers may be deposited in a manner discussed before. Metallic mirrors must be somewhat transmissive and therefore no more than several hundred angstroms thick. Insulator films can have thicknesses from one hundred to several thousand angstroms. Their thickness is determined by the kind of voltages expected in driving the devices.

Referring to FIG. 27B, a more elaborate configuration is shown. This is a compound conductor/mirror, with layer 900 as the substrate or the support membrane. The conductor 906 is either a transparent film such as indium tin oxide (ITO), or a very thin metallic layer such as gold. Either can be deposited using suitable film deposition methods. Thicknesses for the ITO should be in the range of several thousand angstroms, and metallic conductors less than 100 angstroms. 908 is a multilayer dielectric stack comprising the mirror. Such a mirror consists of alternating dielectric films with differing indexes of refraction deposited by a suitable PVD process. By choosing films with appropriate thicknesses and indexes, mirrors with tailorable spectral characteristics can be fabricated as is well known in the art. In general, the thickness of the individual layers is one quarter the wavelength of the light of interest.

Alternatively, these mirrors may be deposited using a technique known as codeposition. In this case, PVD is used to deposit two materials with different refractive indices simultaneously. Using computer control the refractive index of the resulting film can be varied continuously between those of either film. This deposition technique makes possible mirrors with virtually any spectral characteristic.

The ability to design the characteristics of this mirror allow for devices with a greater variety of modes of operation. Unfortunately, because the conductive layer is not perfectly transparent, additional losses are incurred as a result.

Referring to FIGS. 27C and 27D, a dielectric mirror 908 is deposited directly on substrate 900. Metallic conductor 902 and insulator 904 are deposited and patterned such that they form a border around the periphery of the mirror. Using this configuration, it is possible to provide drive voltages to the devices without compromising throughput since the conductor can be placed outside the active area of the device. FIG. 27D shows a planar view of this mirror configuration.

Response times of this device may suffer as a result of decreased conductor area.

Referring to FIG. 28 a, a linear tunable filter is shown which has been fabricated using the process sequence defined above. The major difference is the nature of the mask used to define the self-supporting membrane, which is comprised of support 1006 and 1008. The substrate, 1000, is transparent in the frequency region of interest, and electrodes 1004 are used to drive the device. Dielectric mirror 1002 are defined separately to produce a configuration like that of FIGS. 27 c, 27 d. Three filters are shown though many more can be fabricated. Each filter 1010, 1012, and 1014 is driven independently so that individual frequencies may be separated from an incident light beam. Such a device can find use in spectroscopic analysis, as a demultiplexor in a wavelength division multiplexed fiber optic communication system, a color printer, or any other application where independent frequency selection is required. FIG. 28 b is a top view of the structure.

Referring to FIGS. 29 a and 29 b, a device known as a deformable mirror includes a self-supporting membrane 1102 fabricated on a substrate 1100. When a potential is applied between actuator electrodes 1104 and conducting mirror 1106, the surface of the mirror can be deformed in a controllable manner. Such a device can be used as a component in an adaptive optics system, or in any situation where control of an incident wavefront is required.

Other embodiments are within the scope of the following claims. 

What is claimed is:
 1. A charge control circuit, comprising: a switch circuit having an input node configured to receive a reference voltage at a selected voltage level and configured to respond to a charge signal to pre-charge said input node with a pulse charge at said selected voltage level; and wherein said switch circuit further includes a single switch configured to respond to an enable signal having a variable capacitor with first and second plates and wherein said single switch is coupled to said MEM device to apply said selected voltage level across first and second plates of a variable capacitor of said MEM device for said duration to thereby cause said pulse charge to accumulate on said variable capacitor.
 2. The charge control circuit of claim 1, wherein said single switch comprises a transistor.
 3. The charge control circuit of claim 1, wherein said single switch is a first switch, and said switch circuit further comprises a second switch coupled to said input node and said first switch such that said first switch is between said MEM device and said second switch and wherein said second switch is configured to close to provide said reference voltage to said input node in response to said charge enable signal to charge said input node with said pulse charge.
 4. The charge control circuit of claim 3, wherein said switch circuit further comprises a third switch such that said first, second and third switches are on separate branches connecting to said input node.
 5. The charge control circuit of claim 4, wherein said first switch is configured to close in response to an enable signal and said third switch is configured to close in response to a clear signal.
 6. The charge control circuit of claim 5, wherein closing said first switch in response to said enable signal after charging said input node applies said selected voltage level across said first and second plates.
 7. The charge control circuit of claim 4, wherein opening said second switch and closing said first and third switches provides a path between said first plate and a clear voltage for clearing charge from said first plate.
 8. The charge control circuit of claim 4, wherein said first, second, and third switches comprise p-channel metal oxide semiconductor devices.
 9. The charge control circuit of claim 4, wherein said first, second and third switches comprise n-channel metal oxide semiconductor devices.
 10. The charge control circuit of claim 1, further comprising a variable power supply coupled to said input node and configured to provide said reference voltage at said selected voltage level.
 11. The change control circuit of claim 10, further comprising a controller configured to provide said charge signal, said enable signal, and a clear signal to control said selected voltage level provided by said variable power supply.
 12. A micro-electromechanical cell, comprising: a micro-electromechanical (MEM) device having a variable capacitor formed by a first conductive plate and a second conductive plate separated by a variable gap distance; and a switch circuit having an input node configured to receive a reference voltage at a selected voltage level and configured to respond to a charge signal to pre-charge said input node with a pulse charge at said selected voltage level; and wherein said switch circuit further includes only a first switch coupled to said variable capacitor configured to respond to an enable signal having a duration shorter than a mechanical time constant of a MEM device and coupled to said MEM device to apply said selected voltage level across first and second plates for said duration to thereby cause said pulse charge to accumulate on said variable capacitor.
 13. The micro-electromechanical cell of claim 12, wherein said switch circuit comprises a second switch coupled to said first switch and configured to close to provide said reference voltage to said input node in response to said charge signal to charge said input node with said pulse charge.
 14. The micro-electromechanical cell of claim 13, further comprising a third switch coupled to said input node such that said first, second and third switches are on separate branches connecting to said input node.
 15. The micro-electromechanical cell of claim 14, wherein said first switch is configured to close in response to said enable signal and said third switch is configured to close in response to a clear signal.
 16. The micro-electromechanical cell of claim 14, wherein said first, second, and third switches comprise p-channel metal oxide semiconductor devices.
 17. The micro-electromechanical cell of claim 14, wherein said first, second and third switches comprise n-channel metal oxide semiconductor devices.
 18. A micro-electromechanical system, comprising: an M-row by N-column array of a micro-electromechanical cells, wherein each cell includes a MEM device having a variable capacitor formed by a first conductive plate and a second conductive plate separated by a variable gap distance; and a switch circuit having an input node configured to receive a reference voltage at a selected voltage level and configured to respond to a charge signal to pre-charge said input node with a pulse charge at said selected voltage level and wherein said switch circuit further comprises a single switch coupled to said variable capacitor and configured to respond to a enable signal having a duration shorter than a mechanical time constant of a MEM device and coupled to said MEM device to apply said selected voltage level across first and second plates of a variable capacitor of said MEM device for said duration to thereby cause said pulse charge to accumulate on said variable capacitor.
 19. The system of claim 18, wherein each of said N columns receives a separate reference voltage and all M switch circuits of a given column receive a same reference voltage, wherein each separate reference voltage can have a different selected voltage level.
 20. The system of claim 18, wherein each of said M rows receives a separate enable signal and all of N switch circuits of a given row receive a same enable signal.
 21. The system of claim 18, wherein each switch circuit is further configured to discharge a stored charge on the variable capacitor in response to said enable signal and a clear signal.
 22. A charge control circuit, comprising: means for accumulating a charge; means for transferring said charge to a variable capacitor; means for reducing the capacitance of said means for transferring said charge; and means for removing said charge from said variable capacitor.
 23. A method of controlling a micro-electromechanical device having a variable capacitor, comprising: applying a voltage at a preselected voltage level to charge an input node; providing an enable signal to a first switch to close said first switch for a duration less than the mechanical time constant of said micro-electromechanical device; and applying said charge to said variable capacitor wherein said charge corresponds to a gap distance between first and second conductive plates of said variable capacitor and wherein said first switch is the only switch directly coupled to said variable capacitor.
 24. A method of claim 23, wherein applying said voltage comprises providing a charge enable signal to said first switch to close said first switch to an input voltage.
 25. The method of claim 24, further comprising providing an enable signal and a clear signal to close said first switch and a third switch respectively in order to clear a charge from said variable capacitor.
 26. A charge control circuit, comprising: a switch circuit having an input node configured to receive a reference current at a selected current level and configured to respond to a charge signal to pre-charge said input node with a pulse current at said selected current level; and wherein said switch circuit further comprises a first switch configured to respond to an enable signal having a duration shorter than a mechanical time constant of a micro-electromechanical device (MEM device) and coupled to said MEM device to apply said selected current level across first and second plates of a variable capacitor of said MEM device for said duration to thereby cause said pulse current to accumulate on said variable capacitor wherein the first switch is the only connected to said capacitor.
 27. The charge control circuit of claim 26, wherein said variable gap distance is a function of the magnitude of said stored charge.
 28. The charge control circuit of claim 26, wherein said switch circuit further comprises a second switch coupled to said MEM device and configured to close to provide said reference current to said input node in response to said charge signal to charge said input node with said pulse current.
 29. The charge control circuit of claim 28, further comprising a third switch coupled to said input node and a clear voltage.
 30. The charge control circuit of claim 29, wherein said first switch is configured to close in response to said enable signal and said third switch is configured to close in response to a clear signal.
 31. The charge control circuit of claim 30, wherein closing said second switch in response to said enable signal after charging said input node applies said selected current level across said first and second plates.
 32. The charge control circuit of claim 26, wherein opening said first switch and closing said second and third switches provides a path between said first plate and said clear voltage for clearing charge from said first plate.
 33. The charge control circuit of claim 26, wherein said first, second, and third switches comprise p-channel metal oxide semiconductor devices.
 34. The charge control circuit of claim 26, wherein said first, second and third switches comprise n-channel metal oxide semiconductor devices.
 35. A method of controlling a micro-electromechanical system (MEMS) device having a variable capacitor defining a variable gap distance, comprising: applying a reference voltage having a selected voltage level across the MEMS device so as to cause a stored charge having a desired magnitude to accumulate on the variable capacitor, wherein the variable gap distance is a function of magnitude of the stored charge.
 36. The method of claim 35, further comprising: removing a stored charge on the variable capacitor prior to applying the reference voltage across the micro-electromechanical device.
 37. A method of controlling a MEMS actuator having a pair of plates with a gap therebetween supported by a spring mechanism having a mechanical time constant, comprising: applying a isolatable voltage to the pair of plates to select a desired gap size by having a reference voltage applied then removing the reference voltage after a desired charge has been applied to the pair of plates.
 38. The method of claim 37, further comprising: removing the desired charge accumulated between the first plate and the second plate.
 39. A method of controlling a MEMS actuator having a first plate and a second plate with a restoring force applied to a gap therebetween, the second plate coupled to ground, comprising: switching a reference voltage across the first plate and ground; accumulating a desired charge on the first plate and second plate; and decoupling the reference voltage from the first plate.
 40. The method of claim 39, further comprising: switching the first plate to ground to remove charge accumulated between the first plate and the second plate. 